1. Field of the Invention
The present invention relates to non-volatile memory systems and, more particularly, to a memory system including an in-circuit or on-chip technique to measure threshold voltages of bit cells in the non-volatile memory system.
2. Description of the Related Art
Measurement of threshold voltages of bit cells in NVM systems has typically included using external production test platforms and, for example, measuring the current/voltage characteristics of bit cells in flash memory by sweeping an input voltage and measuring bit cell voltage on a pin. Another method for measurement of threshold voltages of bit cells in NVM systems includes using external production test platforms and, for example, measuring the current/voltage characteristics of bit cells and comparing the bit cell current/voltage characteristics against an internal reference by sweeping an input voltage and reading a digital data output. A disadvantage of both prior methods is that the test platform must be able to sweep a precisely controlled input voltage and, in the case of the first method, measure small bit cell currents.
Typical measurement of current Flash EEPROM array threshold voltage distributions require complicated external voltage and timing control to collect using existing production test platforms. For example, existing production test platforms require synchronization of devices under test, complex control codes, and intelligent test platforms, resulting in long test times and are not suitable for highly parallelized test environments due to the high pin count of the devices under test. Also, in existing production test platforms high precision power supplies are required. Other issues to consider in testing microcontrollers with embedded non-volatile memory (NVM) on a single site tester include decrease data retention and worse gate/drain stress results after program/erase cycling and identification of latent program/erase endurance failures for parts with high endurance specifications.
Conventional testing of microcontrollers with embedded NVM on a single site tester has shown that up to 90% of the total test cost is used just on the flash module. With embedded NVM memory sizes reaching 500 Kbyte and even 1 Mbyte, better and more cost effective methods are needed to test the flash in order to decrease cycle time and reduce costs, while maintaining quality and reliability.
The present invention provides an on-chip digitally controllable precision voltage source to sweep the control gates of the array of bit cells and compare the bit cell current/voltage characteristics against an internal reference. The present invention is self-contained and suitable for self test in highly parallel environments and improves the throughput by eliminating the overhead of the platform tester/device under test handshaking.